FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery

Marc Lupon, Grigorios Magklis and Antonio Gonzalez

Version management, the mechanism that decides how and where transactional modifications are stored, is one of the key design dimensions of Hardware Transactional Memory (HTM) systems. Current HTM systems use either eager or lazy version management. Eager implementations, which keep new values in-place while they hold old values in a software log, suffer long delays when aborts are frequent because the pre-transactional state is recovered by software. Lazy environments, those that buffer new values in specialized hardware, offer complex and inefficient solutions to catch hardware overflows, which are common in applications with coarse-grain transactions.In this paper, we present FASTM, an eager log-based HTM that takes advantage of the processor's cache hierarchy to provide fast abort recovery. FASTM uses a novel coherence protocol to buffer the transactional modifications in the first level cache and to keep the non-speculative values in the higher levels of the memory hierarchy. This mechanism allows fast abort recovery of transactions that do not overflow the first level cache resources. Contrary to lazy HTM systems, committing transactions do not have to move their modifications to the second level cache. FASTM keeps the pre-transactional state in a software log as well, which enables transparent execution even in the case of cache overflows. This approach simplifies eviction policies without degrading performance, given that it only falls back to a software recovery mechanism for transactions whose modified state has overflowed the cache.Simulation results show that FASTM achieves significant speed-up compared to LogTM-SE, improving the scalability of applications with coarse-grain transactions and obtaining similar performance to an ideal eager HTM with zero-cost abort recovery.

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